SimStm

Contents:

• 1. Motivation
• 2. Introduction
  • 2.1. History and License
  • 2.2. Focus
  • 2.3. Features and Advantages
  • 2.4. Contributions and Bugs
  • 2.5. Change Log
• 3. Integration
• 4. Installation
  • 4.1. VHDL code
  • 4.2. IDE plug-ins
    • 4.2.1. Visual Studio Code
    • 4.2.2. Eclipse
    • 4.2.3. Restructured text Syntax Highlghting:
• 5. Language
  • 5.1. General
  • 5.2. Comments
  • 5.3. Namespaces
    • 5.3.1. namespace
  • 5.4. Includes
    • 5.4.1. include
  • 5.5. Arrays
    • 5.5.1. array
    • 5.5.2. array set
    • 5.5.3. array get
    • 5.5.4. array verify
    • 5.5.5. array size
    • 5.5.6. array pointer copy
  • 5.6. Busses
    • 5.6.1. bus
    • 5.6.2. bus write
    • 5.6.3. bus read
    • 5.6.4. bus verify
    • 5.6.5. bus pointer copy
    • 5.6.6. bus pointer set
    • 5.6.7. bus pointer get
    • 5.6.8. bus timeout set
    • 5.6.9. bus timeout get
  • 5.7. Debug
    • 5.7.1. trace
    • 5.7.2. marker
    • 5.7.3. stop
  • 5.8. Files
    • 5.8.1. file
    • 5.8.2. file writable
    • 5.8.3. file readable
    • 5.8.4. file appendable
    • 5.8.5. file write
    • 5.8.6. file append
    • 5.8.7. file read all
    • 5.8.8. file read
    • 5.8.9. file read end
    • 5.8.10. file pointer copy
  • 5.9. Labels
    • 5.9.1. label
    • 5.9.2. label equ
    • 5.9.3. label set
    • 5.9.4. label pointer copy
    • 5.9.5. Powerful Usage Patterns
  • 5.10. Subroutines, Branches, and Loops
    • 5.10.1. proc
    • 5.10.2. call
    • 5.10.3. call label
    • 5.10.4. return
    • 5.10.5. interrupt
    • 5.10.6. if
    • 5.10.7. loop
    • 5.10.8. abort
    • 5.10.9. finish
    • 5.10.10. stop
    • 5.10.11. resume
  • 5.11. Lines
    • 5.11.1. lines
    • 5.11.2. lines get
    • 5.11.3. lines set
    • 5.11.4. lines insert
    • 5.11.5. lines append
    • 5.11.6. lines delete
    • 5.11.7. lines size
    • 5.11.8. lines pointer copy
  • 5.12. Logs
    • 5.12.1. log message
    • 5.12.2. log lines
    • 5.12.3. verbosity
  • 5.13. Objects
    • 5.13.1. const
    • 5.13.2. var
    • 5.13.3. array
    • 5.13.4. file
    • 5.13.5. lines
    • 5.13.6. signal
    • 5.13.7. bus
    • 5.13.8. namespace
    • 5.13.9. label
  • 5.14. Equations and Arithmetic Operations
    • 5.14.1. add
    • 5.14.2. sub
    • 5.14.3. mul
    • 5.14.4. div
    • 5.14.5. rem
    • 5.14.6. and
    • 5.14.7. or
    • 5.14.8. xor
    • 5.14.9. shl
    • 5.14.10. shr
    • 5.14.11. inv
    • 5.14.12. ld
  • 5.15. Random Numbers
    • 5.15.1. random
    • 5.15.2. seed
  • 5.16. Signals
    • 5.16.1. signal
    • 5.16.2. signal write
    • 5.16.3. signal read
    • 5.16.4. signal verify
    • 5.16.5. signal pointer copy
    • 5.16.6. signal pointer set
    • 5.16.7. signal pointer get
  • 5.17. Variables
    • 5.17.1. var
    • 5.17.2. equ
    • 5.17.3. var verify
    • 5.17.4. var pointer copy
  • 5.18. Waits
    • 5.18.1. wait
• 6. Examples
  • 6.1. How to run the examples
  • 6.2. Hello World
  • 6.3. CounterLab
  • 6.4. CounterPlain
  • 6.5. CounterCaseIndexed
  • 6.6. CounterSuitendexed
  • 6.7. CounterSuiteCaseIndexed
  • 6.8. Real-World Examples
  • 6.9. Example modification workflow
• 7. Standard Tests
• 8. JUnit Tests
  • 8.1. Plain
  • 8.2. Case indexed
  • 8.3. Suite indexed
  • 8.4. Suite and Case indexed
• 9. Standard Labs
• 10. Automated Tests
• 11. Repository Guide

Indices and tables

• Index

• Search Page